Current location:Home > News > News

What does PN in rohm agent diode stand for


  1. When the n-type material and p-type material are fused together, the PN junction will be formed, thus forming the semiconductor diode. Previously, we learned how to make n-type semiconductor materials by adding a small amount of antimony to a silicon atom, and how to make p-type semiconductor materials by adding boron to another silicon atom. All well and good, but because the new inclusions in n-type and p-type semiconductors are electrically neutral, they are not very efficient on their own. However, if two semiconductor devices are connected (or combined) together, their respective actions will be combined in very different ways, resulting in a phenomenon commonly referred to as the "p-n junction."

    When an n-type semiconductor material and a p-type semiconductor device are first combined, there will be a very large density gradient between the two sides of the PN junction. As a result, some of the free electrons from the donor residues have only just begun to migrate through the newly formed knot and form holes in the p-shaped material, producing negative ions in the air. However, since the electronics have migrated from n-type silicon to p-type silicon through the pn junction, they have left a positive donor ionization (ND) on the negative side, and now the cavitation transfer in the receptor residue passes through p-type silicon. In the opposite direction, you're going to get a lot of free electrons.

    As a result, negatively charged protein kinase ionization (n-a) was added along the p-type electron density at the junction, and the n-type electron density became positive at the junction. This charge transfer and cavitation across the PN junction in an electronic device is called external diffusion. The total width of P and N layers depends on the weight of the inclusion on each side, with the relative density of the receptor N a and the relative density of the donor Nd, respectively.

    The whole process is repeated until the total number of electronic devices passing through the knot is large enough to resist or prevent a large number of carriers from passing through the knot. Finally, when the donor molecule resists cavitation and the recipient molecule resists the electronic device, the equilibrium condition (electrical neutrality) occurs, forming a "barrier" region around the junction region.

    Since there are no completely free carriers that can stop at the barrier, the regions on either side of the junction are now completely depleted of free carriers, compared to the N and P materials blocking the junction. The region around the PN junction is now called the depletion layer.

    P-n junction

    1. The total positive charges on both sides of the PN junction must be the same and reversed in order to maintain a neutral positive charge around the junction. If the interval of the depletion layer region is D, it must be the positive side of the Dp spacing into the silicon, and the negative side of the Dn spacing into the silicon, and then the relationship between the two is as follows: Dp * NA = keep the positive charge neutral, Dn * ND is also called equilibrium.

    P-n junction spacing

    2. Due to the loss of electronic devices in n-type raw materials and the loss of cavitation in p-type raw materials, n-type raw materials are positively charged relative to p-type ones. Subsequently, residual ionization on both sides of the junction generates an electrostatic field in an area where the n-side is relatively positive relative to the p-side. The difficulty now is that the free charge needs some extra kinetic energy to get rid of the obstruction so that it can get past the depletion junction.

    The electrostatic field caused by the whole process of external diffusion causes the "embedded potential difference" at the node, and the lead (zero bias) potential difference is:

    3. Where Eo is the working voltage of zero reference point junction, VT is the thermal working voltage of 26mV at indoor temperature, ND and NA are the impurity concentration, and ni is the intrinsic concentration value.

    Releasing a moderate positive working voltage (along the reference point) between the two sides of the PN junction generates additional kinetic energy for free electrons and cavitation. The external operating voltage required for the current phase of breaking out of this barrier depends largely on the type of semiconductor device commonly used and the specific temperature. Generally, the operating voltage of silicon on both sides of the depletion layer is about 0.6-0.7v at indoor temperature, and the operating voltage of germanium is about 0.3-0.35v. Even if all components are not connected to all external switching power supplies, as shown in the diode diagram, the barrier will always exist.

    The practical significance of such imbed potential differences beyond the junction depends on the fact that they prevent both the phenomenon of holes passing through the electrons and the flow of electrons through the junction